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Designing the Videopac SDCart. 2: The SD Cart demo

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Introduction I managed to get several ROM binaries on an SD card to interface and run on the Videopac G7000. Last weekend I made a video about the progress so far. It was not all easy. The damn roms wouldn't run from the SRAM. Some problems were ironed out, but remaining was the problem of which address lines to use. The buses were isolated with three 8-bit transcievers, but two of them might be replaced by resistors. Sören Gust's gold mine recide in the archive.org. It was complete with design files for the G7000 RAM cart where you can connect a PC and transfer a ROM via serial. He also shared his source code and documents on the bios library. The Program Memory Map Often address line A10 is not used in game carts. Lets have a look at the memory map. In the program memory map for the Intel 8048, the first 1kb is reserved for the internal program memory, and the remaining 3kb is external program memory. These are accessed with A11..A0. Port1 pins P0 and P1 can be

Designing the Videopac SDCart. 1: The MCU and system bus.

Introduction We will look at the Videopac's digitial system. It is a cartridge based gaming console. The intention of these blog series is to design an SDcard interface. First I'd like to get to know the system, and I will be focusing on the signals present at the Cartridge port. System specs CPU: Intel 8048 8-bit @ 1,79 MHz Memory: RAM: 64 bytes AV-RAM: 128 bytes BIOS-ROM: 1k bytes Cartridges: 2k, 4k and 8k bytes   The Intel 8048 microcontroller The videopac has a MCU with 1k bytes of BIOS ROM.   27 I/O 8-bit timer/counter  Onboard oscillator/clock circuits Address latch enable (ALE) 96 instructions, 1 and 2 bytes long. The Data and address signals are transfered on the same 8-bit BUS. For each instruction fetch, the processor put the address on the BUS, latch it with the latch ALE strobe, and then read the instruction on the BUS driven by a ROM. The digital design of the Videopac The 8048 MCU has an internal rom preprogrammed with a bios. Th